I am a third-year computer science Ph.D. student at the University of Chicago studying quantum computer systems with Fred Chong. Previously, I graduated from Carnegie Mellon University in 2022 with a B.S. in physics and a minor in computer science.
I believe that co-designing quantum hardware and quantum error correction is essential to make scalable quantum computing a reality. I am currently working on improving real-time decoding and designing QEC-specific hardware layouts. I have also recently been working on software mitigation of time-varying noise (such as cosmic ray impacts and shifting two-level system defects) in the surface code. Previously, I have published work in quantum control pulse optimization and a pair of papers on compiling with ququarts. My work so far has mostly had superconducting hardware in mind, but I have also worked with trapped ion and neutral atom architectures. I am currently working on moving more into the quantum error correction space, focusing on topics such as biased-noise QEC and decoding.
In the summer of 2024, I interned with the quantum computing team at Intel, where I created integrated tools for hardware-informed exploration of the QEC design space, providing guidance for Intel’s quantum roadmap. Stay tuned for an upcoming publication!